| |
| 2004 | ||
|---|---|---|
| 3 | EE | Shyue-Kung Lu, Chien-Hung Yeh, Han-Wen Lin: Efficient Built-in Self-Test Techniques for Memory-Based FFT Processors. PRDC 2004: 321-326 |
| 2002 | ||
| 2 | EE | Shyue-Kung Lu, Chien-Hung Yeh: Easily Testable and Fault-Tolerant Design of FFT Butterfly Networks. Asian Test Symposium 2002: 230- |
| 1 | EE | Shyue-Kung Lu, Chien-Hung Yeh: Enhancing Delay Fault Testability for Iterative Logic Array. PRDC 2002: 283-292 |
| 1 | Han-Wen Lin | [3] |
| 2 | Shyue-Kung Lu | [1] [2] [3] |