| |
| 2008 | ||
|---|---|---|
| 5 | EE | S. V. Yarmolik, A. N. Kurbatskii, V. N. Yarmolik: Determination of the optimal initial states for multiple-run RAM testing. Automatic Control and Computer Sciences 42(3): 120-125 (2008) |
| 2007 | ||
| 4 | EE | S. V. Yarmolik, Ireneusz Mrozek, B. Sokol: Address Sequences Generation for Multiple Run Memory Testing. CISIM 2007: 341-344 |
| 3 | EE | S. V. Yarmolik: Generation of address sequences for effective random access memory testing. Automatic Control and Computer Sciences 41(6): 337-342 (2007) |
| 2006 | ||
| 2 | S. V. Yarmolik, B. Sokol: Optimal Memory Address Seeds for Pattern Sensitive Faults Detection. DDECS 2006: 220-221 | |
| 1 | EE | B. Sokol, S. V. Yarmolik: Address Sequences for March Tests to Detect Pattern Sensitive Faults. DELTA 2006: 354-360 |
| 1 | A. N. Kurbatskii | [5] |
| 2 | Ireneusz Mrozek | [4] |
| 3 | B. Sokol | [1] [2] [4] |
| 4 | V. N. Yarmolik | [5] |