2006 | ||
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2 | EE | Ching-Lung Su, Wei-Sen Yang, Ya-Li Chen, Yao-Chang Yang, Ching-Wen Chen, Jiun-In Guo, Shau-Yin Tseng: A Low Complexity High Quality Interger Motion Estimation Architecture Design for H.264/AVC. APCCAS 2006: 398-401 |
1 | EE | Yao-Chang Yang, Chien-Chang Lin, Hsui-Cheng Chang, Ching-Lung Su, Jiun-In Guo: A High Throughput VLSI Architecture Design for H.264 Context-Based Adaptive Binary Arithmetic Decoding with Look Ahead Parsing. ICME 2006: 357-360 |
1 | Hsui-Cheng Chang | [1] |
2 | Ching-Wen Chen | [2] |
3 | Ya-Li Chen | [2] |
4 | Jiun-In Guo | [1] [2] |
5 | Chien-Chang Lin | [1] |
6 | Ching-Lung Su | [1] [2] |
7 | Shau-Yin Tseng | [2] |
8 | Wei-Sen Yang | [2] |