| |
| 2007 | ||
|---|---|---|
| 1 | EE | Kuan Jen Lin, Shan Chien Fang, Shih Hsien Yang, Cheng Chia Lo: Overcoming glitches and dissipation timing skews in design of DPA-resistant cryptographic hardware. DATE 2007: 1265-1270 |
| 1 | Shan Chien Fang | [1] |
| 2 | Kuan Jen Lin | [1] |
| 3 | Cheng Chia Lo | [1] |