2007 |
15 | EE | Hiroyuki Ishikawa,
Sho Shimizu,
Yutaka Arakawa,
Naoaki Yamanaka,
Kosuke Shiba:
New Parallel Shortest Path Searching Algorithm based on Dynamically Reconfigurable Processor DAPDNA-2.
ICC 2007: 1997-2002 |
14 | EE | Hiroyuki Miyagi,
Masahiro Hayashitani,
Daisuke Ishii,
Yutaka Arakawa,
Naoaki Yamanaka:
A Deadline-Aware Scheduling Scheme for Wavelength Assignment in l Grid Networks.
ICC 2007: 2383-2387 |
13 | EE | Satoru Okamoto,
Wataru Imajuku,
Tomohiro Otani,
Itaru Nishioka,
Akira Nagata,
Mikako Nanba,
Hideki Otsuki,
Masatoshi Suzuki,
Naoaki Yamanaka:
GMPLS Interoperability Tests in Kei-han-na Info-Communication Open Laboratory on JGN II Network.
IEICE Transactions 90-B(8): 1936-1943 (2007) |
2005 |
12 | EE | Daisaku Shimazaki,
Eiji Oki,
Kohei Shiomoto,
Naoaki Yamanaka:
Scalable Multi-Layer GMPLS Networks Based on Hierarchical Cloud-Routers.
IEICE Transactions 88-B(3): 1119-1127 (2005) |
11 | EE | Masaru Katayama,
Hidenori Kai,
Junichi Yoshida,
Masaaki Inami,
Hiroki Yamada,
Kohei Shiomoto,
Naoaki Yamanaka:
A 10 Gb/s Firewall System for Network Security in Photonic Era.
IEICE Transactions 88-B(5): 1914-1920 (2005) |
2004 |
10 | EE | Takanori Ito,
Daisuke Ishii,
Kohei Okazaki,
Naoaki Yamanaka,
Iwao Sasase:
A Scheduling Algorithm for Reducing Unused Timeslots by Considering Head Gap and Tail Gap in Time Sliced Optical Burst Switched Networks.
OpNeTec 2004: 79-86 |
9 | EE | Yutaka Arakawa,
Naoaki Yamanaka,
Iwao Sasase:
Performance of Optical Burst Switched WDM Ring Network with TTFR System.
OpNeTec 2004: 95-102 |
1999 |
8 | EE | Kohei Shiomoto,
Naoaki Yamanaka,
Tatsuro Takahashi:
Overview of Measurement-Based Connection Admission Control Methods in ATM Networks.
IEEE Communications Surveys and Tutorials 2(1): (1999) |
1998 |
7 | EE | Kohei Shiomoto,
Shinichiro Chaki,
Naoaki Yamanaka:
A simple bandwidth management strategy based on measurements of instantaneous virtual path utilization in ATM networks.
IEEE/ACM Trans. Netw. 6(5): 625-634 (1998) |
6 | EE | Eiji Oki,
Naoaki Yamanaka:
Impact of Multimedia Traffic Characteristics on ATM Network Configuration.
J. Network Syst. Manage. 6(4): (1998) |
1997 |
5 | | Haruhisa Hasegawa,
Naoaki Yamanaka,
Kohei Shiomoto:
Rate Control for High-Speed Burst Transmission with Quick Response in Universal ATM-WAN, ALPEN.
ICC (3) 1997: 1734-1738 |
4 | | Kouichi Genda,
Naoaki Yamanaka:
TORUS: Terabit-per-Second ATM Switching System Architecture Based on Distributed Internal Speed-Up ATM Switch.
IEEE Journal on Selected Areas in Communications 15(5): 817-829 (1997) |
1996 |
3 | | Shiro Kikuchi,
Naoaki Yamanaka:
An Expandable Time-Division Circuit Switching LSI and Network Architecture for Broadband ISDN.
IEEE Journal on Selected Areas in Communications 14(2): 328-336 (1996) |
1991 |
2 | | Naoaki Yamanaka,
Masaharu Sasaki,
Shiro Kikuchi,
Thoru Takada,
Masao Idda:
A Gigabit-Rate Five-Highway GaAs OE-LSI Chipset for High-Speed Optical Interconnections Between Modules or VLSI's.
IEEE Journal on Selected Areas in Communications 9(5): 689-697 (1991) |
1990 |
1 | | Naoaki Yamanaka,
Shiro Kikuchi,
Masao Suzuki,
Yukiharu Yoshioka:
A 2 Gb/s Expandable Space-Division Switching LSI and Network Architecture for Gigabit-Rate Broad-Band Circuit Switching.
IEEE Journal on Selected Areas in Communications 8(8): 1543-1550 (1990) |