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2005 | ||
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5 | EE | Jen-Lin Fan, Jieh-Tsorng Wu: A robust background calibration technique for switched-capacitor pipelined ADCs. ISCAS (2) 2005: 1374-1377 |
2004 | ||
4 | EE | Chun-Cheng Huang, Jieh-Tsorng Wu: A statistical background calibration technique for flash analog-to-digital converters. ISCAS (1) 2004: 125-128 |
3 | Hsie-Chia Chang, Chien-Ching Lin, Tien-Yuan Hsiao, Jieh-Tsorng Wu, Ta-Hui Wang: Multi-level memory systems using error control codes. ISCAS (2) 2004: 393-396 | |
2003 | ||
2 | EE | Hung-Chih Liu, Zwei-Mei Lee, Jieh-Tsorng Wu: A digital background calibration technique for pipelined analog-to-digital converters. ISCAS (1) 2003: 881-884 |
2001 | ||
1 | EE | Cheng-Chung Hsu, Jieh-Tsorng Wu: Highly linear 100 MHz CMOS programmable gain amplifiers. ISCAS (1) 2001: 647-650 |
1 | Hsie-Chia Chang | [3] |
2 | Jen-Lin Fan | [5] |
3 | Tien-Yuan Hsiao | [3] |
4 | Cheng-Chung Hsu | [1] |
5 | Chun-Cheng Huang | [4] |
6 | Zwei-Mei Lee | [2] |
7 | Chien-Ching Lin | [3] |
8 | Hung-Chih Liu | [2] |
9 | Ta-Hui Wang | [3] |