| |
| 2004 | ||
|---|---|---|
| 1 | Hsie-Chia Chang, Chien-Ching Lin, Tien-Yuan Hsiao, Jieh-Tsorng Wu, Ta-Hui Wang: Multi-level memory systems using error control codes. ISCAS (2) 2004: 393-396 | |
| 1 | Hsie-Chia Chang | [1] |
| 2 | Tien-Yuan Hsiao | [1] |
| 3 | Chien-Ching Lin | [1] |
| 4 | Jieh-Tsorng Wu | [1] |