| 2008 |
|---|
| 8 | EE | Chia-Chun Tsai,
Chung-Chieh Kuo,
Jan-Ou Wu,
Trong-Yen Lee,
Rong-Shue Hsiao:
X-clock routing based on pattern matching.
SoCC 2008: 357-360 |
| 7 | EE | Chia-Chun Tsai,
Jan-Ou Wu,
Trong-Yen Lee:
GDME: Grey Relational Clustering Applied to a Clock Tree Construction with Zero Skew and Minimal Delay.
IEICE Transactions 91-A(1): 365-374 (2008) |
| 2007 |
|---|
| 6 | EE | Jan-Ou Wu,
Chia-Chun Tsai,
Chung-Chieh Kuo,
Trong-Yen Lee:
Zero-Skew Driven Buffered RLC Clock Tree Construction.
IEICE Transactions 90-A(3): 651-658 (2007) |
| 2006 |
|---|
| 5 | EE | Chia-Chun Tsai,
Jan-Ou Wu,
Trong-Yen Lee,
Rong-Shue Hsiao:
Propagation Delay Minimization on RLC-Based Bus with Repeater Insertion.
APCCAS 2006: 1285-1288 |
| 4 | EE | Chia-Chun Tsai,
Jan-Ou Wu,
Yu-Ting Shieh,
Chung-Chieh Kuo,
Trong-Yen Lee:
Tapping Point Numerical-Based Search for Exact Zero-Skew RLC Clock Tree Construction.
APCCAS 2006: 812-815 |
| 3 | EE | Chia-Chun Tsai,
Jan-Ou Wu,
Chien-Wen Kao,
Trong-Yen Lee,
Rong-Shue Hsiao:
Coupling aware RLC-based clock routings for crosstalk minimization.
ISCAS 2006 |
| 2 | EE | Chia-Chun Tsai,
Hann-Cheng Huang,
Trong-Yen Lee,
Wen-Ta Lee,
Jan-Ou Wu:
Using Stack Reconstruction on RTL Orthogonal Scan Chain Design.
J. Inf. Sci. Eng. 22(6): 1585-1599 (2006) |
| 2005 |
|---|
| 1 | EE | Chia-Chun Tsai,
Jan-Ou Wu,
Chung-Chieh Kuo,
Trong-Yen Lee,
Wen-Ta Lee:
Zero-Skew Driven for RLC Clock Tree Construction in SoC.
ICITA (1) 2005: 561-566 |
