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2006 | ||
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3 | EE | Chia-Tsun Wu, Wei Wang, I-Chyn Wey, An-Yeu Wu: A frequency estimation algorithm for ADPLL designs with two-cycle lock-in time. ISCAS 2006 |
2 | EE | Wei Wang, I-Chyn Wey, Chia-Tsun Wu, An-Yeu Wu: A portable all-digital pulsewidth control loop for SOC applications. ISCAS 2006 |
2005 | ||
1 | EE | Chia-Tsun Wu, Wei Wang, I-Chyn Wey, An-Yeu Wu: A scalable DCO design for portable ADPLL designs. ISCAS (6) 2005: 5449-5452 |
1 | Wei Wang | [1] [2] [3] |
2 | I-Chyn Wey | [1] [2] [3] |
3 | An-Yeu Wu | [1] [2] [3] |