| 2008 |
|---|
| 3 | EE | Zvika Guz,
Idit Keidar,
Avinoam Kolodny,
Uri C. Weiser:
Utilizing shared data in chip multiprocessors with the nahalal architecture.
SPAA 2008: 1-10 |
| 2007 |
|---|
| 2 | EE | Zvika Guz,
Idit Keidar,
Avinoam Kolodny,
Uri C. Weiser:
Nahalal: Cache Organization for Chip Multiprocessors.
Computer Architecture Letters 6(1): 21-24 (2007) |
| 2006 |
|---|
| 1 | EE | T. Y. Morad,
Uri C. Weiser,
A. Kolodnyt,
Mateo Valero,
Eduard Ayguadé:
Performance, power efficiency and scalability of asymmetric cluster chip multiprocessors.
Computer Architecture Letters 5(1): 14-17 (2006) |
