| 2006 |
|---|
| 9 | EE | Shuangching Chen,
Shugang Wei:
Weighted-to-residue and residue-to-weighted converters with three-moduli (2n-1, 2n, 2n+1) signed-digit architectures.
ISCAS 2006 |
| 8 | EE | Shugang Wei,
Kensuke Shimizu:
Modulo (2p plusminus 1) Multipliers Using a Three-operand Modular Signed-digit Addition Algorithm.
Journal of Circuits, Systems, and Computers 15(1): 129-144 (2006) |
| 2005 |
|---|
| 7 | EE | Shugang Wei:
Number conversions between RNS and mixed-radix number system based on Modulo (2p - 1) signed-digit arithmetic.
SBCCI 2005: 160-165 |
| 6 | EE | Shugang Wei,
Kensuke Shimizu:
Dynamic Range Compression Characteristics Using an Interpolating Polynomial for Digital Audio Systems.
IEICE Transactions 88-A(2): 586-589 (2005) |
| 2003 |
|---|
| 5 | EE | Shugang Wei,
Kensuke Shimizu:
Residue Checker with Signed-Digit Arithmetic for Error Detection of Arithmetic Circuits.
Journal of Circuits, Systems, and Computers 12(1): 41-54 (2003) |
| 2001 |
|---|
| 4 | EE | Shugang Wei,
Kensuke Shimizu:
Error Detection of Arithmetic Circuits Using a Residue Checker with Signed-Digit Number System.
DFT 2001: 72-77 |
| 1999 |
|---|
| 3 | EE | Shugang Wei,
Kensuke Shimizu:
Residue Arithmetic Circuits Based on Signed-Digit Number Representation and the VHDL Implementation.
Great Lakes Symposium on VLSI 1999: 218- |
| 2 | | Shugang Wei,
Kensuke Shimizu:
Residue Arithmetic Multiplier Based on the Radix-4 Signed-Digit Multiple-Valued Arithmetic Circuits.
VLSI Design 1999: 212-217 |
| 1998 |
|---|
| 1 | EE | Shugang Wei,
Kensuke Shimizu:
Residue Arithmetic Circuits Based on the Signed-Digit Multiple-Valued Arithmetic Circuits.
ISMVL 1998: 276-281 |
