| 2007 |
| 9 | EE | Hironori Washizaki,
Rieko Namiki,
Tomoyuki Fukuoka,
Yoko Harada,
Hiroyuki Watanabe:
A Framework for Measuring and Evaluating Program Source Code Quality.
PROFES 2007: 284-299 |
| 2006 |
| 8 | EE | Hironori Washizaki,
Yasuhide Kobayashi,
Hiroyuki Watanabe,
Eiji Nakajima,
Yuji Hagiwara,
Kenji Hiranabe,
Kazuya Fukuda:
Experiments on quality evaluation of embedded software in Japan robot software design contest.
ICSE 2006: 551-560 |
| 2004 |
| 7 | | Hiroyuki Watanabe,
Shinichiro Koga,
Katsuhiro Kato:
Development of Learning Management System and SCO Presentation Program Based on SCORM.
ICALT 2004 |
| 1991 |
| 6 | | Hiroyuki Watanabe,
James R. Symon,
Wayne D. Dettloff,
Kathy E. Yount:
VLSI Fuzzy Chip and Inference Accelerator Board Systems.
ISMVL 1991: 120-127 |
| 1989 |
| 5 | | Hiroyuki Watanabe:
Heuristic Graph Displayer for G-BASE.
International Journal of Man-Machine Studies 30(3): 287-302 (1989) |
| 1986 |
| 4 | EE | Hiroyuki Watanabe,
Bryan D. Ackland:
Flute - a floorplanning agent for full custom VLSI design.
DAC 1986: 601-607 |
| 3 | EE | Masaki Togai,
Hiroyuki Watanabe:
A VLSI implementation of a fuzzy-inference engine: Toward an expert system on a chip.
Inf. Sci. 38(2): 147-163 (1986) |
| 1985 |
| 2 | | Masaki Togai,
Hiroyuki Watanabe:
A VLSI Implementation of Fuzzy Inference Engine: Toward an Expert System on a Chip.
CAIA 1985: 192-197 |
| 1984 |
| 1 | EE | Gershon Kedem,
Hiroyuki Watanabe:
Graph-Optimization Techniques for IC Layout and Compaction.
IEEE Trans. on CAD of Integrated Circuits and Systems 3(1): 12-20 (1984) |