| 1996 |
|---|
| 5 | EE | Zhongde Wang,
Graham A. Jullien,
William C. Miller:
An efficient tree architecture for modulo 2n+1 multiplication.
VLSI Signal Processing 14(3): 241-248 (1996) |
| 1995 |
|---|
| 4 | EE | Wenzhe Luo,
Graham A. Jullien,
Neil M. Wigley,
William C. Miller,
Zhongde Wang:
An array processor for inner product computations using a Fermat number ALU.
ASAP 1995: 270-281 |
| 3 | | Zhongde Wang,
Graham A. Jullien,
William C. Miller:
A New Design Technique for Column Compression Multipliers.
IEEE Trans. Computers 44(8): 962-970 (1995) |
| 1994 |
|---|
| 2 | | June Wang,
Zhongde Wang,
Graham A. Jullien,
William C. Miller:
Area-Time Analysis of Carry Lookahead Adders Using Enhanced Multiple Output Domino Logic.
ISCAS 1994: 59-62 |
| 1993 |
|---|
| 1 | | Zhongde Wang,
Graham A. Jullien,
William C. Miller,
June Wang:
New Concepts for the Design of Carry Lookahaead Adders.
ISCAS 1993: 1837-1840 |
