2008 |
5 | EE | Ching-Te Chiu,
Tsun-Hsien Wang,
Wei-Ming Ke,
Chen-Yu Chuang,
Jhih-Rong Chen,
Rong Yang,
Ren-Song Tsay:
Design optimization of a global/local tone mapping processor on arm SOC platform for real-time high dynamic range video.
ICIP 2008: 1400-1403 |
2007 |
4 | EE | Tsun-Hsien Wang,
Wei-Ming Ke,
Ding-Chuang Zwao,
Fang-Chu Chen,
Ching-Te Chiu:
Block-Based Gradient Domain High Dynamic Range Compression Design for Real-Time Applications.
ICIP (3) 2007: 561-564 |
3 | EE | Tsun-Hsien Wang,
Wei-Su Wong,
Fang-Chu Chen,
Ching-Te Chiu:
Design and Implementation of a Real-Time Global Tone Mapping Processor for High Dynamic Range Video.
ICIP (6) 2007: 209-212 |
2 | EE | Tsun-Hsien Wang,
Ching-Te Chiu:
Low Power Design of High Performance Memory Access Architecture for HDTV Decoder.
ICME 2007: 699-702 |
1 | EE | Chia-Hao Yu,
Chung-Kai Liu,
Chih-Heng Kang,
Tsun-Hsien Wang,
Chih-Chien Shen,
Shau-Yin Tseng:
An Efficient DMA Controller for Multimedia Application in MPU Based SOC.
ICME 2007: 80-83 |