| |
| 2008 | ||
|---|---|---|
| 2 | EE | Shuaiqi Wang, Fule Li, Yasuaki Inoue: A 12-bit 3.7-Msample/s Pipelined A/D Converter Based on the Novel Capacitor Mismatch Calibration Technique. IEICE Transactions 91-A(9): 2465-2474 (2008) |
| 2006 | ||
| 1 | EE | Shuaiqi Wang, Fule Li, Yasuaki Inoue: A 15-bit 10-Msample/s Pipelined A/D Converter Based on Incomplete Settling Principle. IEICE Transactions 89-A(10): 2732-2739 (2006) |
| 1 | Yasuaki Inoue | [1] [2] |
| 2 | Fule Li | [1] [2] |