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Kapil Vyas

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2009
2EEVijay Khawshe, Kapil Vyas, Renu Rangnekar, Prateek Goyal, Vijay Krishna, Kashinath Prabhu, Pravin Kumar Venkatesan, Leneesh Raghavan, Rajkumar Palwai, M. Thrivikraman, Kunal Desai, Abhijit Abhyankar: A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link. VLSI Design 2009: 373-378
2007
1EEVijay Khawshe, Pravin V. Kumar, Renu Rangnekar, Kapil Vyas, Kashi Prabu, Mahabaleshwara, Manish Jain, Navin Mishra, Abhijit Abhyankar: A 2.5Gbps Quad CMOS Transceiver Cell Using Regulated Supply Low Jitter PLL. VLSI Design 2007: 141-145

Coauthor Index

1Abhijit Abhyankar [1] [2]
2Kunal Desai [2]
3Prateek Goyal [2]
4Manish Jain [1]
5Vijay Khawshe [1] [2]
6Vijay Krishna [2]
7Pravin V. Kumar [1]
8 Mahabaleshwara [1]
9Navin Mishra [1]
10Rajkumar Palwai [2]
11Kashinath Prabhu [2]
12Kashi Prabu [1]
13Leneesh Raghavan [2]
14Renu Rangnekar [1] [2]
15M. Thrivikraman [2]
16Pravin Kumar Venkatesan [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)