dblp.uni-trier.dewww.uni-trier.de

Abhijit Abhyankar

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2009
2EEVijay Khawshe, Kapil Vyas, Renu Rangnekar, Prateek Goyal, Vijay Krishna, Kashinath Prabhu, Pravin Kumar Venkatesan, Leneesh Raghavan, Rajkumar Palwai, M. Thrivikraman, Kunal Desai, Abhijit Abhyankar: A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link. VLSI Design 2009: 373-378
2007
1EEVijay Khawshe, Pravin V. Kumar, Renu Rangnekar, Kapil Vyas, Kashi Prabu, Mahabaleshwara, Manish Jain, Navin Mishra, Abhijit Abhyankar: A 2.5Gbps Quad CMOS Transceiver Cell Using Regulated Supply Low Jitter PLL. VLSI Design 2007: 141-145

Coauthor Index

1Kunal Desai [2]
2Prateek Goyal [2]
3Manish Jain [1]
4Vijay Khawshe [1] [2]
5Vijay Krishna [2]
6Pravin V. Kumar [1]
7 Mahabaleshwara [1]
8Navin Mishra [1]
9Rajkumar Palwai [2]
10Kashinath Prabhu [2]
11Kashi Prabu [1]
12Leneesh Raghavan [2]
13Renu Rangnekar [1] [2]
14M. Thrivikraman [2]
15Pravin Kumar Venkatesan [2]
16Kapil Vyas [1] [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)