| |
| 1994 | ||
|---|---|---|
| 4 | Raymond P. Voith: The PowerPC 603 C++ Verilog Interface Model. COMPCON 1994: 337-340 | |
| 1993 | ||
| 3 | Sankaran Karthik, Jacob A. Abraham, Raymond P. Voith: Optimizations for Behavioral/RTL Simulation. VLSI Design 1993: 311-316 | |
| 1977 | ||
| 2 | Raymond P. Voith: Minimum Universal Logic Module Sequential Circuits with Decoders. IEEE Trans. Computers 26(10): 1032-1035 (1977) | |
| 1 | Raymond P. Voith: ULM Implicants for Minimization of Universal Logic Module Circuits. IEEE Trans. Computers 26(5): 417-424 (1977) | |
| 1 | Jacob A. Abraham | [3] |
| 2 | Sankaran Karthik | [3] |