N. Venugopalachary
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2009
1
EE
V. Vireen
, N. Venugopalachary,
G. Seetharaman
,
B. Venkataramani
: Built in Self Test Based Design of Wave-Pipelined Circuits in ASICs.
VLSI Design 2009
: 473-478
Coauthor
Index
1
G. Seetharaman
[
1
]
2
B. Venkataramani
[
1
]
3
V. Vireen
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
