Vigen Valijan

1996
1	EE	John Y. Sayah, Rajesh Gupta, Deepak D. Sherlekar, Philip S. Honsinger, Jitendra M. Apte, S. Wayne Bollinger, Hai Hsia Chen, Sumit DasGupta, Edward P. Hsieh, Andrew D. Huber, Edward J. Hughes, Zahi M. Kurzum, Vasant B. Rao, Thepthai Tabtieng, Vigen Valijan, David Y. Yang: Design planning for high-performance ASICs. IBM Journal of Research and Development 40(4): 431-452 (1996)

Coauthor Index

1	Jitendra M. Apte	[1]
2	S. Wayne Bollinger	[1]
3	Hai Hsia Chen	[1]
4	Sumit DasGupta	[1]
5	Rajesh K. Gupta (Rajesh Gupta)	[1]
6	Philip S. Honsinger	[1]
7	Edward P. Hsieh	[1]
8	Andrew D. Huber	[1]
9	Edward J. Hughes	[1]
10	Zahi M. Kurzum	[1]
11	Vasant B. Rao	[1]
12	John Y. Sayah	[1]
13	Deepak D. Sherlekar	[1]
14	Thepthai Tabtieng	[1]
15	David Y. Yang	[1]