| |
| 2008 | ||
|---|---|---|
| 5 | Xiang Xiao, Tuo Shi, Pranav Vaidya, Jaehwan Lee: R-tree: A Hardware Implementation. CDES 2008: 3-9 | |
| 4 | EE | Pranav Vaidya, Jaehwan (John) Lee: Characterization of TPC-H queries for a column-oriented database on a dual-core amd athlon processor. CIKM 2008: 1411-1412 |
| 3 | Pranav Vaidya, Jaehwan John Lee, Xiang Xiao: Multiprocessor Simulation Using Communicating Sequential Processes. MSV 2008: 215-221 | |
| 2007 | ||
| 2 | Pranav Vaidya, Jaehwan John Lee: Design Space Exploration of Multiprocessor Systems with MultiContext Reconfigurable Co-Processors. ERSA 2007: 51-60 | |
| 1 | EE | Pranav Vaidya, Jaehwan John Lee: Simulation of hybrid computer architectures: simulators, methodologies and recommendations. VLSI-SoC 2007: 157-162 |
| 1 | Jaehwan Lee | [5] |
| 2 | Jaehwan (John) Lee | [4] |
| 3 | Jaehwan John Lee | [1] [2] [3] |
| 4 | Tuo Shi | [5] |
| 5 | Xiang Xiao | [3] [5] |