2006 | ||
---|---|---|
2 | EE | Kuo-Hsing Cheng, Kai-Fei Chang, Yu-lung Lo, Ching-Wen Lai, Yuh-Kuang Tseng: A 100MHz-1GHz adaptive bandwidth phase-locked loop in 90nm process. ISCAS 2006 |
1994 | ||
1 | Yuh-Kuang Tseng, Kuo-Hsing Cheng, Chung-Yu Wu: Feedback-Controlled Enhance-Pull-Down BiCMOS for Sub-3-V Digital Circuit. ISCAS 1994: 23-26 |
1 | Kai-Fei Chang | [2] |
2 | Kuo-Hsing Cheng | [1] [2] |
3 | Ching-Wen Lai | [2] |
4 | Yu-lung Lo | [2] |
5 | Chung-Yu Wu | [1] |