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Yuh-Kuang Tseng

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2006
2EEKuo-Hsing Cheng, Kai-Fei Chang, Yu-lung Lo, Ching-Wen Lai, Yuh-Kuang Tseng: A 100MHz-1GHz adaptive bandwidth phase-locked loop in 90nm process. ISCAS 2006
1994
1 Yuh-Kuang Tseng, Kuo-Hsing Cheng, Chung-Yu Wu: Feedback-Controlled Enhance-Pull-Down BiCMOS for Sub-3-V Digital Circuit. ISCAS 1994: 23-26

Coauthor Index

1Kai-Fei Chang [2]
2Kuo-Hsing Cheng [1] [2]
3Ching-Wen Lai [2]
4Yu-lung Lo [2]
5Chung-Yu Wu [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)