2008 |
35 | EE | Chien-Cheng Tseng,
Su-Ling Lee:
Design of second order digital differentiator using Richardson extrapolation and fractional delay.
ISCAS 2008: 1120-1123 |
34 | EE | Chien-Cheng Tseng,
Su-Ling Lee:
Design of fractional delay FIR filter using discrete Fourier transform interpolation method.
ISCAS 2008: 1156-1159 |
33 | EE | Chien-Cheng Tseng,
Su-Ling Lee:
Digital IIR integrator design using recursive Romberg integration rule and fractional sample delay.
Signal Processing 88(9): 2222-2233 (2008) |
32 | EE | Chien-Cheng Tseng:
Series expansion design of variable fractional order integrator and differentiator using logarithm.
Signal Processing 88(9): 2278-2292 (2008) |
2007 |
31 | EE | Chien-Cheng Tseng:
Designs of fractional delay filter, Nyquist filter, lowpass filter and diamond-shaped filter.
Signal Processing 87(4): 584-601 (2007) |
30 | EE | Chien-Cheng Tseng:
Design of FIR and IIR fractional order Simpson digital integrators.
Signal Processing 87(5): 1045-1057 (2007) |
2006 |
29 | EE | Chien-Cheng Tseng:
Design of IIR integrators using Newton-Cotes quadrature rule and fractional sample delay.
ISCAS 2006 |
28 | EE | Chien-Cheng Tseng:
Design of half sample delay IIR filter using continued fraction expansion.
ISCAS 2006 |
27 | EE | Chien-Cheng Tseng:
Design of variable and adaptive fractional order FIR differentiators.
Signal Processing 86(10): 2554-2566 (2006) |
26 | EE | Chien-Cheng Tseng,
Su-Ling Lee:
Linear phase FIR differentiator design based on maximum signal-to-noise ratio criterion.
Signal Processing 86(2): 388-398 (2006) |
2005 |
25 | EE | Chien-Cheng Tseng,
Tsung-Ming Hwang:
Quantum circuit design of discrete Hartley transform using recursive decomposition formula.
ISCAS (1) 2005: 824-827 |
24 | EE | Chien-Cheng Tseng,
Tsung-Ming Hwang:
Quantum circuit design of 8×8 discrete cosine transform using its fast computation flow graph.
ISCAS (1) 2005: 828-831 |
23 | EE | Chien-Cheng Tseng:
Improved design of fractional order differentiator using fractional sample delay.
ISCAS (4) 2005: 3713-3716 |
22 | EE | Chien-Cheng Tseng:
Digital differentiator design using fractional sample delay filter.
ISCAS (4) 2005: 3717-3720 |
2004 |
21 | | Chien-Cheng Tseng,
Tsung-Ming Hwang:
Quantum circuit design of 8 /spl times/ 8 discrete Hartley transform.
ISCAS (3) 2004: 397-400 |
20 | EE | Chien-Cheng Tseng:
Design of variable fractional delay FIR filter using symmetry.
ISCAS (3) 2004: 477-480 |
2003 |
19 | EE | Chien-Cheng Tseng:
Design of sinusoid-based variable fractional delay FIR filter using weighted least squares method.
ISCAS (3) 2003: 546-549 |
18 | EE | Chien-Cheng Tseng:
Analytical design of fractional Hilbert transformer using fractional differencing.
ISCAS (4) 2003: 173-176 |
17 | EE | Chien-Cheng Tseng:
Design of 2-D variable fractional delay FIR filter using 2-D differentiators.
ISCAS (4) 2003: 189-192 |
16 | EE | Chien-Cheng Tseng:
Design of IIR digital allpass filters using least pth phase error criterion.
ISCAS (4) 2003: 209-212 |
2002 |
15 | EE | Chien-Cheng Tseng:
Design of variable fractional delay FIR filter using differentiator bank.
ISCAS (4) 2002: 421-424 |
14 | EE | Chien-Cheng Tseng:
Design of variable fractional delay allpass filter using weighted least squares method.
ISCAS (5) 2002: 713-716 |
2001 |
13 | EE | Chien-Cheng Tseng,
Su-Ling Lee:
Elimination of power line interference and noise in electrocardiogram using constrained eigenfilter.
ISCAS (2) 2001: 405-408 |
12 | EE | Chien-Cheng Tseng,
Su-Ling Lee:
Design of digital differentiator based on maximum signal to noise ratio criterion.
ISCAS (2) 2001: 77-80 |
11 | EE | Shih-Chang Hsia,
Chien-Cheng Tseng:
A recursive full search algorithm based on temporal correlation.
Signal Processing 81(11): 2419-2427 (2001) |
2000 |
10 | EE | Chien-Cheng Tseng,
Soo-Chang Pei,
Shih-Chang Hsia:
Computation of fractional derivatives using Fourier transform and digital FIR differentiator.
Signal Processing 80(1): 151-159 (2000) |
9 | EE | Chien-Cheng Tseng:
Stable IIR digital differentiator design using iterative quadratic programming approach.
Signal Processing 80(5): 857-866 (2000) |
1999 |
8 | EE | Soo-Chang Pei,
Chien-Cheng Tseng:
FIR filter design based on total least squares error criterion.
ISCAS (3) 1999: 283-286 |
7 | EE | Chien-Cheng Tseng,
Bor-Shenn Jeng,
Kuo-Sen Chou:
Candidate Selection in On-Line Chinese Character Recognition System Using Voting Scheme.
J. Inf. Sci. Eng. 15(3): 451-462 (1999) |
1998 |
6 | EE | Chien-Cheng Tseng,
Chang-Jung Juan,
Hsi-Cheng Chang,
Jeen-Fong Lin:
An optimal line segment extraction algorithm for online Chinese character recognition using dynamic programming.
Pattern Recognition Letters 19(10): 953-961 (1998) |
1996 |
5 | EE | Soo-Chang Pei,
Chien-Cheng Tseng,
Ching-Yung Lin:
A parallel decoding algorithm for IFS codes without transient behavior.
IEEE Transactions on Image Processing 5(3): 411-415 (1996) |
4 | EE | Shyh-Rong Lay,
Chao-Hao Lee,
Nai-Jen Cheng,
Chien-Cheng Tseng,
Bor-Shenn Jeng,
Pei-Yih Ting,
Quen-Zong Wu,
Miin-Luen Day:
On-line chinese character recognition with effective candidate radical and candidate character selections.
Pattern Recognition 29(10): 1647-1659 (1996) |
1995 |
3 | EE | Soo-Chang Pei,
Chien-Cheng Tseng,
Ching-Yung Lin:
Wavelet transform and scale space filtering of fractal images.
IEEE Transactions on Image Processing 4(5): 682-687 (1995) |
1993 |
2 | | Soo-Chang Pei,
Ching-Yung Lin,
Chien-Cheng Tseng:
Two-dimensional LMS adaptive linear phase filters.
ISCAS 1993: 311-314 |
1 | | Soo-Chang Pei,
Chien-Cheng Tseng:
Two dimensional IIR and FIR digital notch filter design.
ISCAS 1993: 890-893 |