2008 | ||
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2 | EE | Hong-Yi Huang, Yi-Jui Tsai, Kung-Liang Ho, Chan-Yu Lin: All digital time-to-digital converter using single delay-locked loop. SoCC 2008: 341-344 |
2007 | ||
1 | EE | Hong-Yi Huang, Sheng-Da Wu, Yi-Jui Tsai: A New Cycle-Time-to-Digital Converter With Two Level Conversion Scheme. ISCAS 2007: 2160-2163 |
1 | Kung-Liang Ho | [2] |
2 | Hong-Yi Huang | [1] [2] |
3 | Chan-Yu Lin | [2] |
4 | Sheng-Da Wu | [1] |