| |
| 2006 | ||
|---|---|---|
| 4 | EE | Jun-Hong Weng, Meng-Ting Tsai, Jung-Mao Lin, Ching-Yuan Yang: A 1.8-Gb/s burst-mode clock and data recovery circuit with a 1/4-rate clock technique. ISCAS 2006 |
| 3 | EE | Meng-Ting Tsai, Ching-Yuan Yang: A frequency synthesizer realized by a transformer-based voltage-controlled oscillator for IEEE 802.11a/b/g channels. ISCAS 2006 |
| 2 | EE | Ching-Yuan Yang, Meng-Ting Tsai: High-Frequency Low-Noise Voltage-Controlled LC-Tank Oscillators Using a Tunable Inductor Technique. IEICE Transactions 89-C(11): 1567-1574 (2006) |
| 2005 | ||
| 1 | EE | Ching-Yuan Yang, Jen-Wen Chen, Meng-Ting Tsai: A high-frequency phase-compensation fractional-N frequency synthesizer. ISCAS (5) 2005: 5091-5094 |
| 1 | Jen-Wen Chen | [1] |
| 2 | Jung-Mao Lin | [4] |
| 3 | Jun-Hong Weng | [4] |
| 4 | Ching-Yuan Yang | [1] [2] [3] [4] |