| 2008 |
|---|
| 3 | EE | Hidehiro Toyoda,
Michitaka Okuno,
Shinji Nishimura,
Matsuaki Terada:
A 100 Gb/s and High-Reliable Physical-Layer Architecture for VSR and Backplane Ethernet.
ICC 2008: 5417-5421 |
| 2007 |
|---|
| 2 | EE | Hidehiro Toyoda,
Shinji Nishimura,
Michitaka Okuno,
Matsuaki Terada:
A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications.
IEICE Transactions 90-C(10): 1957-1963 (2007) |
| 2006 |
|---|
| 1 | EE | Hidehiro Toyoda,
Shinji Nishimura,
Michitaka Okuno,
Kouji Fukuda,
Kouji Nakahara,
Hiroaki Nishi:
100-Gb/s Physical-Layer Architecture for Next-Generation Ethernet.
IEICE Transactions 89-B(3): 696-703 (2006) |
