2007 | ||
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3 | EE | Welson Sun, Michael J. Wirthlin, Stephen Neuendorffer: FPGA Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing. IEEE Trans. on CAD of Integrated Circuits and Systems 26(2): 254-265 (2007) |
2006 | ||
2 | EE | Michael J. Wirthlin, Welson Sun: DSynth: A Pipeline Synthesis Environment for FPGAs. FCCM 2006: 343-344 |
1 | EE | Welson Sun, Michael J. Wirthlin, Stephen Neuendorffer: Combining module selection and resource sharing for efficient FPGA pipeline synthesis. FPGA 2006: 179-188 |
1 | Stephen Neuendorffer | [1] [3] |
2 | Michael J. Wirthlin | [1] [2] [3] |