2006 | ||
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1 | EE | Tze-Yun Sung, Mao-Jen Sun, Yaw-Shih Shieh, Hsi-Chin Hsin: Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation. PSIVT 2006: 802-811 |
1 | Hsi-Chin Hsin | [1] |
2 | Yaw-Shih Shieh | [1] |
3 | Tze-Yun Sung | [1] |