Gayvin E. Stong

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1991

2 Bulent I. Dervisoglu, Gayvin E. Stong: Design for Testability: Using Scanpath Techniques for Path-Delay Test and Measurement. ITC 1991: 365-374

1 Bulent I. Dervisoglu, Gayvin E. Stong: Application of Scan-Based DFT Methodology for Detecting Static and Timing Failures in VLSI Components. VLSI 1991: 429-438

1991
2		Bulent I. Dervisoglu, Gayvin E. Stong: Design for Testability: Using Scanpath Techniques for Path-Delay Test and Measurement. ITC 1991: 365-374
1		Bulent I. Dervisoglu, Gayvin E. Stong: Application of Scan-Based DFT Methodology for Detecting Static and Timing Failures in VLSI Components. VLSI 1991: 429-438

Coauthor Index

1 Bulent I. Dervisoglu [1] [2]