| |
| 2006 | ||
|---|---|---|
| 3 | EE | Pawel Sniatala, R. Rudnicki: Automated design and layout generation for switched current circuits. ISCAS 2006 |
| 2 | EE | Jacek Pierzchlewski, Pawel Sniatala, Blazej Nowakowski, Andrzej Rybarczyk, Wojciech Wencel: FPGA Chip as a System Master for Hardware Aided Parallel Computing. PARELEC 2006: 220-226 |
| 2004 | ||
| 1 | EE | Pawel Sniatala, André S. Botha: A/D converter based on a new memory cell implemented using the switched current technique. Microelectronics Reliability 44(5): 861-867 (2004) |
| 1 | André S. Botha | [1] |
| 2 | Blazej Nowakowski | [2] |
| 3 | Jacek Pierzchlewski | [2] |
| 4 | R. Rudnicki | [3] |
| 5 | Andrzej Rybarczyk | [2] |
| 6 | Wojciech Wencel | [2] |