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André Sieber

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2008
3EESilvio Misera, Heinrich Theodor Vierhaus, André Sieber: Simulated fault injections and their acceleration in SystemC. Microprocessors and Microsystems - Embedded Hardware Design 32(5-6): 270-278 (2008)
2007
2EESilvio Misera, Heinrich Theodor Vierhaus, André Sieber: Fault Injection Techniques and their Accelerated Simulation in SystemC. DSD 2007: 587-595
2006
1EESilvio Misera, Heinrich Theodor Vierhaus, Lars Breitenfeld, André Sieber: A Mixed Language Fault Simulation of VHDL and SystemC. DSD 2006: 275-279

Coauthor Index

1Lars Breitenfeld [1]
2Silvio Misera [1] [2] [3]
3Heinrich Theodor Vierhaus [1] [2] [3]

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