| |
| 1998 | ||
|---|---|---|
| 1 | M. Bhaskar Sherigar, A. S. Mahadevan, K. Senthil Kumar, Sumam David: A Pipelined Parallel Processor to Implement MD4 Message Digest Algorithm on Xilinx FPGA. VLSI Design 1998: 394-399 | |
| 1 | Sumam David | [1] |
| 2 | K. Senthil Kumar | [1] |
| 3 | A. S. Mahadevan | [1] |