| |
| 2005 | ||
|---|---|---|
| 1 | EE | Andreas G. Veneris, Robert Chang, Magdy S. Abadir, Sep Seyedi: Functional Fault Equivalence and Diagnostic Test Generation in Combinational Logic Circuits Using Conventional ATPG. J. Electronic Testing 21(5): 495-502 (2005) |
| 1 | Magdy S. Abadir | [1] |
| 2 | Robert Chang | [1] |
| 3 | Andreas G. Veneris | [1] |