Alexander D. Schapira

List of publications from the DBLP Bibliography Server - FAQ

1988

1 EE Peter M. Maurer, Alexander D. Schapira: A logic-to-logic comparator for VLSI layout verification. IEEE Trans. on CAD of Integrated Circuits and Systems 7(8): 897-907 (1988)

1988
1	EE	Peter M. Maurer, Alexander D. Schapira: A logic-to-logic comparator for VLSI layout verification. IEEE Trans. on CAD of Integrated Circuits and Systems 7(8): 897-907 (1988)

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