| 2006 |
|---|
| 8 | EE | V. Jimenez-Fernandez,
Luis Hernández-Martínez,
Arturo Sarmiento-Reyes:
A method for finding the DC solution regions in piecewise-linear networks.
ISCAS 2006 |
| 7 | EE | V. Jimenez-Fernandez,
Luis Hernández-Martínez,
Arturo Sarmiento-Reyes:
Decomposed piecewise-linear models by hyperplanes unbending.
ISCAS 2006 |
| 2005 |
|---|
| 6 | EE | H. Vazquez-Leal,
Luis Hernández-Martínez,
Arturo Sarmiento-Reyes:
Double-bounded homotopy for analysing nonlinear resistive circuits.
ISCAS (4) 2005: 3203-3206 |
| 2003 |
|---|
| 5 | EE | Luis Hernández-Martínez,
Arturo Sarmiento-Reyes:
Topological Considerations for the Diagnosability Conditions of Analogue Circuits Using a Pair of Conjugate Trees.
J. Electronic Testing 19(1): 29-36 (2003) |
| 2002 |
|---|
| 4 | EE | E. Yildiz,
Arturo Sarmiento-Reyes,
Chris J. M. Verhoeven,
Arie van Staveren:
Determination of voltage source values in modern biasing techniques of analog circuits.
ISCAS (1) 2002: 721-724 |
| 1999 |
|---|
| 3 | EE | Gordana Jovanovic-Dolecek,
Arturo Sarmiento-Reyes:
An Efficient Method for Narrowband FIR Filter Design.
Computación y Sistemas 2(2-3): (1999) |
| 1995 |
|---|
| 2 | | Arturo Sarmiento-Reyes:
A Novel Method to Predict Both, the Upper Bound on the Number and the Stability of DC Operating Points of Transistor Circuits.
ISCAS 1995: 101-104 |
| 1994 |
|---|
| 1 | | Arturo Sarmiento-Reyes,
Jan Davidse,
E. Kleihorst,
Arthur H. M. van Roermund:
A Partitioning-based Method to Determine the Uniqueness of the DC Operating Points of Transistor Circuits.
ISCAS 1994: 193-196 |
