2008 |
14 | EE | Thomas Richter:
Effective Visual Masking Techniques in JPEG2000.
DCC 2008: 540 |
13 | EE | Thomas Richter,
Chaker Larabi:
Subjective and Objective Assesment of Visual Image Quality Metrics and Still Image Codecs.
DCC 2008: 541 |
12 | EE | Thomas Richter:
Effective visual masking techniques in JPEG200.
ICIP 2008: 2876-2879 |
11 | EE | Thomas Richter:
Visual quality improvement techniques of HDPhoto/JPEG-XR.
ICIP 2008: 2888-2891 |
10 | EE | Sven Grottke,
Sabina Jeschke,
Thomas Richter:
An Integrated Course on Wavelet-Based Image Compression - Learning Abstract Information Theory on Visual Data.
Innovative Techniques in Instruction Technology, E-learning, E-assessment, and Education 2008: 457-461 |
2007 |
9 | | Thomas Richter,
Sven Grottke,
Ruedi Seiler:
Faster JPEG2000 Encoding With Apriori Rate Allocation.
IMECS 2007: 1828-1832 |
8 | EE | Sabina Jeschke,
Christian Thomsen,
Thomas Richter,
Harald Scheel:
On Remote and Virtual Experiments in eLearning in Statistical Mechanics and Thermodynamics.
PerCom Workshops 2007: 153-158 |
7 | EE | Sabina Jeschke,
Harald Scheel,
Thomas Richter,
Christian Thomsen:
On Remote and Virtual Experiments in eLearning.
JSW 2(6): 76-85 (2007) |
2006 |
6 | EE | Sven Grottke,
Thomas Richter,
Ruedi Seiler:
Apriori Rate Allocation in Wavelet-Based Image Compression.
AXMEDIS 2006: 329-336 |
5 | EE | Sabina Jeschke,
Nicole Natho,
Thomas Richter,
Ruedi Seiler,
Marc Wilke:
Knowledge Management in mArachna.
ISM 2006: 746-749 |
4 | EE | Sabine Cikic,
Sabina Jeschke,
Thomas Richter,
Uwe Sinha,
Christian Thomsen:
Networked Experiments and Scientific Resource Sharing in Cooperative Knowledge Spaces.
ISM 2006: 953-958 |
3 | EE | Sabina Jeschke,
Thomas Richter:
Individualization and Flexibility through Computer Algebra Systems in Virtual Laboratories.
ISM 2006: 965-970 |
2005 |
2 | | Sabina Jeschke,
Thomas Richter,
Ruedi Seiler:
Konzepte intelligenter Assistenten in Virtuellen Laboren für Mathematik.
Leipziger Informatik-Tage 2005: 227-235 |
1 | EE | Thomas Richter,
Gerhard Fettweis:
Interleaving on Parallel DSP Architectures.
VLSI Signal Processing 39(1-2): 161-173 (2005) |