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Girish B. Ratanpal

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2004
2EEGirish B. Ratanpal, Ronald D. Williams, Travis N. Blalock: An On-Chip Signal Suppression Countermeasure to Power Analysis Attacks. IEEE Trans. Dependable Sec. Comput. 1(3): 179-189 (2004)
2001
1EEJosé G. Delgado-Frias, Girish B. Ratanpal: A VLSI wrapped wave front arbiter for crossbar switches. ACM Great Lakes Symposium on VLSI 2001: 85-88

Coauthor Index

1Travis N. Blalock [2]
2José G. Delgado-Frias [1]
3Ronald D. Williams [2]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)