Sitaram Raju
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1991
1
EE
Karen A. Bartlett
,
Gaetano Borriello
, Sitaram Raju: Timing optimization of multiphase sequential logic.
IEEE Trans. on CAD of Integrated Circuits and Systems 10
(1): 51-62 (1991)
Coauthor
Index
1
Karen A. Bartlett
[
1
]
2
Gaetano Borriello
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)