Chandrasekar Rajagopal

List of publications from the DBLP Bibliography Server - FAQ

2004

3 EE Chandrasekar Rajagopal, Adrián Núñez-Aldana: CMOS Analog Programmable Logic Array. ISVLSI 2004: 291-292

2003

2 EE Chandrasekar Rajagopal, Karthik Sridhar, Adrian Nunez: RF CMOS circuit optimizing procedure and synthesis tool. ACM Great Lakes Symposium on VLSI 2003: 100-103

1993

1 EE Belur V. Sheela, Chandrasekar Rajagopal, K. Padmanabhan: TEMPO - template matching by parametric optimization. Pattern Recognition Letters 14(1): 65-69 (1993)

2004
3	EE	Chandrasekar Rajagopal, Adrián Núñez-Aldana: CMOS Analog Programmable Logic Array. ISVLSI 2004: 291-292
2003
2	EE	Chandrasekar Rajagopal, Karthik Sridhar, Adrian Nunez: RF CMOS circuit optimizing procedure and synthesis tool. ACM Great Lakes Symposium on VLSI 2003: 100-103
1993
1	EE	Belur V. Sheela, Chandrasekar Rajagopal, K. Padmanabhan: TEMPO - template matching by parametric optimization. Pattern Recognition Letters 14(1): 65-69 (1993)

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