| 1993 |
|---|
| 4 | | P. Marimuthu,
K. S. Raghunathan:
BEST: Bond Editor and Test Vector Translator.
VLSI Design 1993: 111 |
| 3 | | Suhail Ahmed,
T. V. Nagesh,
Ramoji Rao,
B. Naveen,
P. K. Fangaria,
K. S. Raghunathan:
FLOR: A Hierarchical Floorplanner Under Vinyas VCX System - System Overview.
VLSI Design 1993: 73-79 |
| 2 | EE | B. Naveen,
K. S. Raghunathan:
An Automatic Netlist-to-Schematic Generator.
IEEE Design & Test of Computers 10(1): 36-41 (1993) |
| 1982 |
|---|
| 1 | | Gregor von Bochmann,
Eduard Cerny,
Michel Gagne,
Claude Jard,
Alain Léveillé,
Clement Lacaille,
Michel Maksud,
K. S. Raghunathan,
Behçet Sarikaya:
Some Experience with the Use of Formal Specifications.
PSTV 1982: 171-185 |
