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Yu Pu

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2008
3EEYu Pu, Jose de Jesus Pineda de Gyvez, Henk Corporaal, Yajun Ha: Statistical noise margin estimation for sub-threshold combinational circuits. ASP-DAC 2008: 176-179
2007
2EEYu Pu, Jose de Jesus Pineda de Gyvez, Henk Corporaal, Yajun Ha: Vt balancing and device sizing towards high yield of sub-threshold static logic gates. ISLPED 2007: 355-358
2006
1EEYu Pu, Yajun Ha: An automated, efficient and static bit-width optimization methodology towards maximum bit-width-to-error tradeoff with affine arithmetic model. ASP-DAC 2006: 886-891

Coauthor Index

1Henk Corporaal [2] [3]
2Jose de Jesus Pineda de Gyvez [2] [3]
3Yajun Ha [1] [2] [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)