| |
| 2006 | ||
|---|---|---|
| 2 | EE | Praveen Elakkumanan, Kishan Prasad, Ramalingam Sridhar: Time Redundancy Based Scan Flip-Flop Reuse To Reduce SER Of Combinational Logic. ISQED 2006: 617-624 |
| 2005 | ||
| 1 | EE | Praveen Elakkumanan, Kishan Prasad, Ramalingam Sridhar: Low Power SER Tolerant Design to Mitigate Single Event Transients in Nanoscale Circuits. J. Low Power Electronics 1(2): 182-193 (2005) |
| 1 | Praveen Elakkumanan | [1] [2] |
| 2 | Ramalingam Sridhar | [1] [2] |