Chih-Yang Peng
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2006
1
EE
Chih-Yang Peng,
Wen-Chang Chao
,
Yao-Wen Chang
,
Jyh-Herng Wang
: Simultaneous block and I/O buffer floorplanning for flip-chip design.
ASP-DAC 2006
: 213-218
Coauthor
Index
1
Yao-Wen Chang
[
1
]
2
Wen-Chang Chao
[
1
]
3
Jyh-Herng Wang
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
