2007 |
16 | EE | Sheayun Lee,
Jaejin Lee,
Chang Yun Park,
Sang Lyul Min:
Selective code transformation for dual instruction set processors.
ACM Trans. Embedded Comput. Syst. 6(2): (2007) |
2005 |
15 | EE | Do Han Kwon,
Sung-Soo Kim,
Chang Yun Park,
Chung Il Jung:
Experiments on the Energy Saving and Performance Effects of IEEE 802.11 Power Saving Mode (PSM).
ICOIN 2005: 41-51 |
2004 |
14 | EE | Sheayun Lee,
Jaejin Lee,
Chang Yun Park,
Sang Lyul Min:
A Flexible Tradeoff Between Code Size and WCET Using a Dual Instruction Set Processor.
SCOPES 2004: 244-258 |
2003 |
13 | | Sheayun Lee,
Jaejin Lee,
Chang Yun Park,
Sang Lyul Min:
A Flexible Tradeoff between Code Size and WCET Employing Dual Instruction Set Processors.
WCET 2003: 91-94 |
2001 |
12 | EE | Chang-Gun Lee,
Kwangpo Lee,
Joosun Hahn,
Yang-Min Seo,
Sang Lyul Min,
Rhan Ha,
Seongsoo Hong,
Chang Yun Park,
Minsuk Lee,
Chong-Sang Kim:
Bounding Cache-Related Preemption Delay for Real-Time Systems.
IEEE Trans. Software Eng. 27(9): 805-826 (2001) |
1998 |
11 | | Chang-Gun Lee,
Joosun Hahn,
Yang-Min Seo,
Sang Lyul Min,
Rhan Ha,
Seongsoo Hong,
Chang Yun Park,
Minsuk Lee,
Chong-Sang Kim:
Analysis of Cache-Related Preemption Delay in Fixed-Priority Preemtive Scheduling.
IEEE Trans. Computers 47(6): 700-713 (1998) |
1997 |
10 | EE | Chang-Gun Lee,
Joosun Hahn,
Yang-Min Seo,
Sang Lyul Min,
Rhan Ha,
Seongsoo Hong,
Chang Yun Park,
Minsuk Lee,
Chong-Sang Kim:
Enhanced analysis of cache-related preemption delay in fixed-priority preemptive scheduling.
IEEE Real-Time Systems Symposium 1997: 187-198 |
9 | | Minsuk Lee,
Sang Lyul Min,
Heonshik Shin,
Chong-Sang Kim,
Chang Yun Park:
Threaded Prefetching: A New Instruction Memory Hierarchy for Real-Time Systems.
Real-Time Systems 13(1): 47-65 (1997) |
1996 |
8 | EE | Chang-Gun Lee,
Joosun Hahn,
Sang Lyul Min,
Rhan Ha,
Seongsoo Hong,
Chang Yun Park,
Minsuk Lee,
Chong-Sang Kim:
Analysis of cache-related preemption delay in fixed-priority preemptive scheduling.
IEEE Real-Time Systems Symposium 1996: 264-274 |
1995 |
7 | | Yerang Hur,
Young Hyun Bae,
Sung-Soo Lim,
Sung-Kwan Kim,
Byung-Do Rhee,
Sang Lyul Min,
Chang Yun Park,
Heonshik Shin,
Chong-Sang Kim:
Worst Case Timing Analysis of RISC Processors: R3000/R3010 Case Study.
IEEE Real-Time Systems Symposium 1995: 308-321 |
6 | EE | Sung-Soo Lim,
Young Hyun Bae,
Gyu Tae Jang,
Byung-Do Rhee,
Sang Lyul Min,
Chang Yun Park,
Heonshik Shin,
Kunsoo Park,
Soo-Mook Moon,
Chong-Sang Kim:
An Accurate Worst Case Timing Analysis for RISC Processors.
IEEE Trans. Software Eng. 21(7): 593-604 (1995) |
1994 |
5 | | Sung-Soo Lim,
Young Hyun Bae,
Gyu Tae Jang,
Byung-Do Rhee,
Sang Lyul Min,
Chang Yun Park,
Heonshik Shin,
Kunsoo Park,
Chong-Sang Kim:
An Accurate Worst Case Timing Analysis Technique for RISC Processors.
IEEE Real-Time Systems Symposium 1994: 142-151 |
1993 |
4 | | Minsuk Lee,
Sang Lyul Min,
Chang Yun Park,
Young Hyun Bae,
Heonshik Shin,
Chong-Sang Kim:
A Dual-Mode Instruction Prefetch Scheme for Improved Worst Case and Average Case Program Execution Times.
IEEE Real-Time Systems Symposium 1993: 98-105 |
3 | | Chang Yun Park:
Predicting Program Execution Times by Analyzing Static and Dynamic Program Paths.
Real-Time Systems 5(1): 31-62 (1993) |
1991 |
2 | | Chang Yun Park,
Alan C. Shaw:
Experiments with a Program Timing Tool Based on Source-Level Timing Schema.
IEEE Computer 24(5): 48-57 (1991) |
1990 |
1 | | Chang Yun Park,
Alan C. Shaw:
Experiments with a Program Timing Tool Based on Source-Level Timing Schema.
IEEE Real-Time Systems Symposium 1990: 72-81 |