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Jiaofeng Pan

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1998
2 Jiaofeng Pan, Yu-Liang Wu, C. K. Wong: On the Optimal Sub-routing Structures of 2-D FPGA Greedy Routing Architectures. ASP-DAC 1998: 535-540
1EEJiaofeng Pan, Yu-Liang Wu, C. K. Wong, Guiying Yan: On the optimal four-way switch box routing structures of FPGA greedy routing architectures1. Integration 25(2): 137-159 (1998)

Coauthor Index

1Chak-Kuen Wong (C. K. Wong) [1] [2]
2Yu-Liang Wu (David Yu-Liang Wu) [1] [2]
3Guiying Yan [1]

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