2000 | ||
---|---|---|
2 | EE | Andrea Pallotta, Francesco Centurelli, Alessandro Trifiletti: A low-power clock and data recovery circuit for 2.5 Gb/s SDH receivers. ISLPED 2000: 67-72 |
1998 | ||
1 | Andrea Pallotta, Francesco Centurelli, Francesco Loriga, Alessandro Trifiletti: A monolithic 2.5-Gb/s clock and data recovery circuit based on Silicon bipolar technology. SYBEN 1998: 183-190 |
1 | Francesco Centurelli | [1] [2] |
2 | Francesco Loriga | [1] |
3 | Alessandro Trifiletti | [1] [2] |