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Björn Osterloh

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2009
3EEBjörn Osterloh, Harald Michalik, Björn Fiethe: SoCWire: A Robust and Fault Tolerant Network-on-Chip Approach for a Dynamic Reconfigurable System-on-Chip in FPGAs. ARCS 2009: 50-59
2007
2EEBjörn Osterloh, Harald Michalik, Björn Fiethe, F. Bubenhagen: Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application. AHS 2007: 258-262
1EEBjörn Fiethe, Harald Michalik, C. Dierker, Björn Osterloh, G. Zhou: Reconfigurable system-on-chip data processing units for space imaging instruments. DATE 2007: 977-982

Coauthor Index

1F. Bubenhagen [2]
2C. Dierker [1]
3Björn Fiethe [1] [2] [3]
4Harald Michalik [1] [2] [3]
5G. Zhou [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)