1984 | ||
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2 | EE | Takeshi Tokuda, Jiro Korematsu, Osamu Tomisawa, S. Asai, I. Ohkura, T. Enomoto: A Hierarchical Standard Cell Approach for Custom VLSI Design. IEEE Trans. on CAD of Integrated Circuits and Systems 3(3): 172-177 (1984) |
1983 | ||
1 | EE | Takeshi Tokuda, Kaoru Okazaki, K. Sakashita, I. Ohkura, T. Enomoto: Delay-Time Modeling for ED MOS Logic LSI. IEEE Trans. on CAD of Integrated Circuits and Systems 2(3): 129-134 (1983) |
1 | S. Asai | [2] |
2 | T. Enomoto | [1] [2] |
3 | Jiro Korematsu | [2] |
4 | Kaoru Okazaki | [1] |
5 | K. Sakashita | [1] |
6 | Takeshi Tokuda | [1] [2] |
7 | Osamu Tomisawa | [2] |