| 1995 |
|---|
| 3 | EE | Shinji Odanaka,
Tatsuo Nogi:
Massively parallel computation using a splitting-up operator method for three-dimensional device simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(7): 824-832 (1995) |
| 1991 |
|---|
| 2 | EE | Hiroshi Kadota,
Katsuyuki Kaneko,
I. Okabayashi,
T. Okamoto,
T. Mimura,
Yasuhiro Nakakura,
A. Wakatani,
Masaitsu Nakajima,
J. Nishikawa,
K. Zaiki,
Tatsuo Nogi:
Parallel computer ADENART - its architecture and application.
ICS 1991: 1-8 |
| 1989 |
|---|
| 1 | | Hiroshi Kadota,
Katsuyuki Kaneko,
Yuji Tanikawa,
Tatsuo Nogi:
VLSI Parallel Computer with Data Transfer Network: ADENA.
ICPP (1) 1989: 319-322 |
