| |
| 2000 | ||
|---|---|---|
| 6 | EE | Mahadevamurty Nemani, Vivek Tiwari: Macro-driven circuit design methodology for high-performance datapaths. DAC 2000: 661-666 |
| 1999 | ||
| 5 | EE | Mahadevamurty Nemani, Farid N. Najm: High-level area and power estimation for VLSI circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 18(6): 697-713 (1999) |
| 1998 | ||
| 4 | EE | Mahadevamurty Nemani, Farid N. Najm: Delay Estimation VLSI Circuits from a High-Level View. DAC 1998: 591-594 |
| 1997 | ||
| 3 | EE | Mahadevamurty Nemani, Farid N. Najm: High-level area and power estimation for VLSI circuits. ICCAD 1997: 114-119 |
| 1996 | ||
| 2 | EE | Mahadevamurty Nemani, Farid N. Najm: High-level power estimation and the area complexity of Boolean functions. ISLPED 1996: 329-334 |
| 1 | EE | Mahadevamurty Nemani, Farid N. Najm: Towards a high-level power estimation capability [digital ICs]. IEEE Trans. on CAD of Integrated Circuits and Systems 15(6): 588-598 (1996) |
| 1 | Farid N. Najm | [1] [2] [3] [4] [5] |
| 2 | Vivek Tiwari | [6] |